Is a
Patent attributes
Current Assignee
0
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hiroyuki Mizuno0
Kiyoo Itoh0
Date of Patent
July 14, 2009
0Patent Application Number
116497660
Date Filed
January 5, 2007
0Patent Primary Examiner
Patent abstract
The well voltage of a CMOS circuit having low-threshold-voltage MOSFETs is controlled when the power supply is turned on, during normal operation, and when the supply voltage is cut off. The CMOS circuit can thus operate stably with lower power consumption, because latching-up is reduced when the supply voltage is applied to the CMOS circuit or when the supply voltage is cut off, and subthreshold current is decreased during normal operation.
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