Patent 7562174 was granted and assigned to NVIDIA on July, 2009 by the United States Patent and Trademark Office.
A motherboard includes two bus connectors. Each connector has contact positions for a set of serial data lanes. A private bus is formed in the motherboard to couple a subset of the serial data lanes of the two connectors. In one implementation, each connector is a Peripheral Component Interface Express (PCIe) connector with a private bus coupling a subset of the serial data lanes of the two PCIe connectors.