US Patent 7567450 Low power ROM

A low power ROM includes a plurality of ROM core groups coupled between a plurality of word lines and bit lines, a word line decoder for selecting a desired word line of the plurality of word lines, a column decoder for selecting a desired bit line of the plurality of bit lines, a common reference voltage generator for generating a common reference voltage, and a plurality of sense amplifiers having the same number as the number of ROM core groups, for comparing an output of the common reference voltage generator and data of a bit line of each ROM core group.