Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
July 28, 2009
Patent Application Number
11757229
Date Filed
June 1, 2007
Patent Primary Examiner
Patent abstract
A method and apparatus for calculating ramptime propagation for integrated circuit layout patterns having pins interconnected in an oriented graph in one or more closed loops is described. Ramptime values are calculated for a first set of the pins, which are not connected to a closed loop while leaving a second set of the pins with unknown ramptime values. One or more closed loops are identified by backtracking from the pins in the second set with unknown ramptime values. A ramptime value for each pin in the one or more closed loops is calculated iteratively.
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