Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
August 4, 2009
Patent Application Number
11220920
Date Filed
September 8, 2005
Patent Citations Received
Patent Primary Examiner
Patent abstract
A DRAM memory cell array is fabricated such that, for each memory cell of the array, the gate electrode is initially produced such that it is insulated from all the other gate electrodes assigned to a certain word line, and is only connected to the other gate electrodes assigned to the corresponding word line via the word line in a subsequent step.
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