Patent attributes
There is provided a differential signal comparator which maintains the duty ratio of complementary input signals. The differential signal comparator includes differential amplifier circuits 1 and 2 receiving complementary input signals, a plurality of current amplifier circuits 3 to 6 for amplifying current output from the differential amplifier circuits and a current arithmetic operation circuit 7 for an arithmetic operation of an output from the plurality of current amplifier circuits 3 to 6 at the time of converting the differential signal between the complementary input signals into a voltage of CMOS level, wherein a capacitive load of an output of the differential amplifier circuit is constant independent of a level of the input signals. A voltage signal which is current-voltage converted to a complementary CMOS level signal is input into a differential comparator to obtain a single end CMOS level signal.
