US Patent 7573751 Flash memory device having single page buffer structure

A flash memory device includes memory cells, a common node, a sense node connected to a selected bit line, a first register connected to the common node, a second register connected to the common node and the sense node, a common sense circuit connected to the common node, the sense node, and a control node; a switch, and a pre-charge circuit connected to the control node and configured to pre-charge the control node.