US Patent 7574554 Storage system and data protection method therefor

To detect an address error in flash memory using a different data management unit from that in a hard disk drive. In cache memory, data read/written from/to a flash memory chip is managed in units of first data lengths. A page, which is the data management unit in a flash memory chip, includes a data section of a second data length from/to which a storage controller can read/write data; and a redundant section. When writing data, the storage controller creates a protection code enabling identification of a write destination page address, divides the data in the cache memory, which is managed in units of first data lengths, into pieces so that the size of each set composed of a piece of the divided write data and its protection code will be of a second data length, and writes the respective sets in a flash memory chip in units of second data lengths.