US Patent 7580465 Low speed access to DRAM
Patent 7580465 was granted and assigned to Intel on August, 2009 by the United States Patent and Trademark Office.
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Embodiments provide access to a memory over a high speed serial link at slower speeds than the high speed serial links regular operation. An embodiment may comprise a memory apparatus with a differential receiver coupled to a protocol recognition circuit, a low speed receiving circuit that has a first receiver coupled with a first input of the differential receiver and a second receiver coupled with a second input of the differential receiver, wherein the low speed receiving circuit is coupled with the protocol recognition circuit, allowing the first and second receivers to access the protocol recognition block at a different frequency than the differential receiver.
US Patent 07580465 Low speed access to DRAM US Patent 7580465 Low speed access to DRAM
US Patent 07580465 Low speed access to DRAM
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