Patent attributes
In a multiprocessor, one of two local memories can be accessed at a high speed by one of the two processors and also accessed by the other processor. In a multiprocessor, first and second local memories are coupled to first and second processors via first and second local buses. First and second bus bridges are coupled to a system bus and the first and second local buses. First and second bus interface units are coupled to the system bus and the first and second local memories. A high-speed access is made from the first processor to the first local memory via the first local bus. The first local memory is also accessed from the first processor via the first local bus, the first bus bridge, the system bus, and the first and third ports of the second bus interface unit and from the second processor via the second local bus, the second bus bridge, the system bus, and the second and third ports of the first bus interface unit. A high-speed access is made from the second processor to the second local memory via the second local bus. The second local memory is also accessed from the second processor via the second local bus, the second bus bridge, the system bus, and the second and third ports of the first bus interface unit and from the first processor via the first local bus, the first bus bridge, the system bus, and the first and third ports of the second bus interface unit.
