US Patent 7583540 Flash memory device and method of programming the same

A flash memory device and a method of programming the same are disclosed. The flash memory device includes an array of memory cells intersected by a plurality of bit lines and a plurality of word lines. A page buffer circuit includes a plurality of latches coupled to an even virtual bit line and an odd virtual bitline. The page buffer circuit is configured to load data into the array of memory cells responsive to a select circuit, which is structured to electrically couple at least some of the bit lines to the plurality of latches of the page buffer circuit.