Patent attributes
A method of manufacturing a pixel structure controlled by a data line and a scan line is provided. A gate electrode electrically coupled to the scan line is formed on a substrate and a first dielectric layer covering the scan line and the gate electrode is formed. A first and a second semiconductor layer are formed on the dielectric layer and a source/drain and a patterned conductor layer are formed. A second dielectric layer is formed on the substrate to cover the data line, the resistance line and the source/drain. A first pixel electrode and a second pixel electrode are formed on the second dielectric layer and these two pixel electrodes are separated from each other; wherein the first pixel electrode is electrically connected to one of the source/drain while the second pixel electrode is electrically connected to another of the source/drain through the resistance wire.
