US Patent 7588985 Method for fabricating fin transistor

A method for fabricating a fin transistor includes patterning a first pad layer provided over a substrate using an isolation mask, etching the substrate using the isolation mask and the first pad layer to form trenches, filling the trenches with an insulating material to form isolation structures, etching the isolation structures within the trenches using a gas having a high selectivity ratio of the insulating material to the first pad layer to form fin structures, forming a gate insulating layer over the fin structures, and forming a conductive layer over the gate insulating layer.