Patent attributes
The invention is mainly directed to providing a charge pump circuit which realizes low power consumption. A first clock signal is supplied from an oscillator circuit to capacitor elements forming a charge pump circuit. A current generation circuit controls a current flowing through each of inverters by controlling operation of PMOS and NMOS, and as a result controls the frequency of the first clock signal. A gate and a drain of PMOS are short-circuited, and between the node thereof and a ground terminal a constant current generation circuit and a resistor are connected in parallel. The constant current generation circuit serves to keep the current flowing through the inverters constant against a change of a power supply voltage. Therefore, the frequency of the clock signal is reduced according to the increase of the power supply voltage.
