US Patent 7589990 Semiconductor ROM device and manufacturing method thereof

The present invention provides a new semiconductor Read-Only Memory, ROM, which stores more than one bit per cell. The potential of multiple threshold voltages combined with the potential multiple ratios of device channel width and length makes an ROM cell store multiple bits feasible. An N-type or a P-type MOS device of the standard CMOS process or a flat-cell mask ROM process are operable devices and processes in the design of this multi layer cell ROM. The ROM cell with smaller size is implemented to represent the LSB bits, while the larger size ROM cell is to represent the MSB bits.