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US Patent 7592213 Tensile strained NMOS transistor using group III-N source/drain regions

Patent 7592213 was granted and assigned to Intel on September, 2009 by the United States Patent and Trademark Office.

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Patent abstract

Enhancement mode transistors are described where a Group III-N compound is used in the source and drain regions to place tensile strain on the channel. The source and drain regions may be raised or embedded, and fabricated in conjunction with recessed or raised compression regions for p channel transistors.

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