Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
September 22, 2009
0Patent Application Number
122496890
Date Filed
October 10, 2008
0Patent Primary Examiner
Patent abstract
A memory READ command triggered clock synchronization mode turns on a clock synchronization circuit only for memory READ operations. The clock synchronization circuit achieves a signal lock with the reference clock signal in less time than the column address strobe latency. Precise memory READ operations are thus possible without wasting power when such operations are not performed by allowing the clock synchronization circuitry to be turned off.
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