US Patent 7599235 Memory correction system and method

An error correction system and method operable to identify and correct a memory module disposed within a computer memory system. In one embodiment, the memory system comprises a first memory module and a second memory module, each comprising a plurality of memory devices; and a memory controller operably coupled to the first memory module and the second memory module, the memory controller operable to use an error correction code (ECC) word, comprising data and redundant data, to detect module-level errors in the first and second memory modules.