US Patent 7603501 Communication circuit of serial peripheral interface devices

A communication circuit of a serial peripheral interface (SPI) device includes a master device and a plurality of slave devices. One of the slave devices includes a plurality of general purpose input/output (GPIO) pins. The chip select terminal of the master device is connected to the control terminal of the slave device having the GPIO pins. The GPIO pins respectively are connected to the control terminals of other slave devices. The slave device having the GPIO pins receives an instruction having an address signal from the master device and compares the addresses are identical, the slave device having the GPIO pins communicates with the master device. Otherwise the slave device transmits the address signal to the control terminals of the other slave devices through the GPIO pins. The other slave devices compare the address signal with their own address. The slave device having the identical address communicates with the master device.