US Patent 7605082 Capping before barrier-removal IC fabrication method

Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.