Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
William K. Henson0
Dureseti Chidambarrao0
Kern Rim0
Ricardo A. Donaton0
Date of Patent
October 27, 2009
Patent Application Number
11380689
Date Filed
April 28, 2006
Patent Primary Examiner
Patent abstract
The invention relates to a semiconductor structure and method of manufacturing and more particularly to a CMOS device with a stress inducing material embedded in both gates and also in the source/drain region of the PFET and varying thickness of the PFET and NFET channel. In one embodiment, the structure enhances the device performance by varying the thickness of the top Silicon layer respective to the NFET or the PFET.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.
