US Patent 7609554 High voltage switching circuit

A high voltage switching circuit that has a depletion mode NMOS transistor, an enhancement mode PMOS transistor and, an enhancement mode NMOS transistor. A control circuit generates first and second control signals. A first control signal controls the enhancement mode NMOS transistor and a logical combination of both control signals provides a bias to control the PMOS transistor. The bias on the PMOS transistor provides a gate voltage greater than ground potential after the high voltage has been switched to the circuit output.