US Patent 7613958 Error detection in a system having coupled channels

A data communications architecture employing serializers and deserializers that reduces data communications latency. In an illustrative implementation, the data communications architecture communicates data across communications links. The architecture maintains various mechanisms to promote data communications speed and to avoid communication link down time. These mechanisms perform the functions including but not limited to handling uncertain data arrival times, detecting single bit and multi-bit errors, handling communications link failures, addressing failed link training, identifying and marking data as corrupt, and identifying and processing successful data transactions across the communications link.