Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Dureseti Chidambarrao0
William K. Henson0
Ricardo A. Donaton0
Kern Rim0
Date of Patent
November 10, 2009
0Patent Application Number
113806880
Date Filed
April 28, 2006
0Patent Primary Examiner
Patent abstract
A semiconductor structure and method of manufacturing and more particularly a CMOS device with a stress inducing material embedded in both gates and also in the source/drain region of the PFET. The PFET region and the NFET region having a different sized gate to vary the device performance of the NFET and the PFET.
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