Patent attributes
A method of manufacturing a non-volatile memory device includes sequentially depositing a first insulation layer, a charge storage layer, and a second insulation layer on a substrate, forming a first opening through the resultant structure to expose the substrate, forming second and third openings through the second insulation layer to form a second insulation layer pattern, forming a conductive layer on the second insulation layer pattern, forming a photoresist pattern structure on the conductive layer, and forming simultaneously a common source line, at least one ground selection line, at least one string selection line, and a plurality of gate structures on the substrate by etching through the photoresist pattern structure, wherein the common source line and the gate structures are formed simultaneously on a substantially same level and of substantially same components.
