US Patent 7622336 Manufacturing method of semiconductor device

To provide a manufacturing method of a semiconductor device with a reduced chip area by reducing the size of a pattern for forming an integrated circuit. For example, the size of an IC chip that is provided as an application of IC cards or IC tags can be reduced. The manufacturing method includes the steps of forming a gate electrode; forming an insulating layer over the gate electrode; and forming an opening in the insulating layer. One or both of the step of forming the gate electrode and the step of forming the opening in the insulating layer is/are conducted by a lithography process using a phase-shift mask or a hologram mask. Accordingly, micropatterns can be formed even over a substrate with low planarity such as a glass substrate.