Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Szu-Ping Chen0
Ching-Tzong Wang0
Date of Patent
November 24, 2009
0Patent Application Number
113061950
Date Filed
December 19, 2005
0Patent Primary Examiner
Patent abstract
A synchronization control apparatus for driving a display module in an interlacing scan mode includes: a delay circuit for delaying an input vertical sync (IVS) signal to generate a delayed signal; and a multiplexer coupled to the delay circuit for selecting one of the IVS signal and the delayed signal according to an odd/even field indication signal to generate an output vertical sync (OVS) signal.
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