Patent attributes
Systems and methods for performing logic built-in-self-tests (LBISTS) in digital circuits. In one embodiment, the operation of LBIST circuitry is suspended at the end of each test cycle so that the bit patterns generated by the functional logic of the device under test can be examined to determine if any errors occurred during the test cycle. Pseudorandom bit patterns are scanned into the scan chains interposed between portions of the functional logic circuit and then propagated through the functional logic. The resulting bit patterns are captured in scan chains following the functional logic and then scanned out of the scan chains. The bit patterns are processed and compared to corresponding data generated by a parallel LBIST system in a device that is known to operate properly. The LBIST test cycles are then halted if there are errors in the generated bit patterns or resumed if there are no errors.
