Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Tetsuya Fukuoka0
Minoru Motoyoshi0
Shigeru Nakahara0
Date of Patent
December 8, 2009
0Patent Application Number
121672360
Date Filed
July 2, 2008
0Patent Primary Examiner
Patent abstract
The semiconductor integrated circuit includes a first subordinate clock tree 802 and a second subordinate clock tree 803, wherein a clock is delayed by a variable delay circuit 805 and inputted into the second subordinate clock tree 803 so that the phases are matched each other of the output clocks from the end clock drivers with the same position in respective trees, thereby reducing clock skew.
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