Patent attributes
An image sensor having a first substrate on which a CCD array is fabricated in a first fabrication system is disclosed. The CCD array includes a node through which charge from the pixels passes during a readout operation. The first substrate also includes a first FET fabricated on the first substrate in the first fabrication system, the first FET having a gate connected to the node and a source or drain connected to a first conducting pad on the first substrate. A capacitor connects the node to a second conducting pad on the first substrate. A switch is connected across the first capacitor such that the first capacitor is shorted when the first switch is closed. The first switch is controlled by a reset signal on a third conducting pad on the first substrate. The first substrate can be connected to a second substrate having amplification and control circuitry.
