Patent 7653864 was granted and assigned to Intel on January, 2010 by the United States Patent and Trademark Office.
Embodiments to perform improved error control using packet fragments are described. The apparatus may include a padding module to add a pad byte to uneven packet fragments of a packet, a partial checksum generator module to generate a partial error control value for each packet fragment, a pseudo-header generator module to generate a pseudo header for the packet, and a partial checksum combiner module to combine the partial error control values into an error control value. Other embodiments are described and claimed.