US Patent 7656193 Programmable logic device and method of testing

In one embodiment of the invention, a programmable logic device includes a plurality of programmable resources; non-volatile configuration memory adapted to store configuration data for configuring the plurality of programmable resources; a register adapted to load configuration data into the non-volatile configuration memory; and test circuitry coupled to the register. The test circuitry is adapted to configure a programmable resource with test data stored in the register rather than with configuration data stored in the non-volatile configuration memory. In another embodiment of the invention, the programmable logic device includes a buffer coupled between the configuration memory and a programmable resource, and the test circuitry includes a logic circuit coupled between the register, the configuration memory, and the buffer. The logic circuit is responsive to a test mode signal to route test data from the register to the buffer.