US Patent 7656201 Output buffer circuit
Patent 7656201 was granted and assigned to Renesas Technology Corp on February, 2010 by the United States Patent and Trademark Office.
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When a first signal is switched from an L level to an H level and a second signal is switched from an H level to an L level, and a first constant current source cannot follow the switching immediately thereafter and has not yet been switched, a first node remains at an H level, so an output node remains at an L level. In such state, a second node having been connected to a third node of an H level before the switching becomes connected to the first node of an H level by the switching. At the same time, the output part of an inverter is switched from an H level to an L level, causing the second node to be switched from an H level to an L level as well via a capacitor. At this time, the potential of the first node is reduced to become equal to the second node, to make a transition to an L level.
US Patent 07656201 Output buffer circuit US Patent 7656201 Output buffer circuit
US Patent 07656201 Output buffer circuit
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