US Patent 7656216 Method and system for determining a clock input mode

A method and system is provided for clock input mode selection. When a signal provided on one of two clock input terminals is received, the received signal is considered in connection with a second input signal in order to determine whether the first input signal and the second input signal satisfy a pre-determined condition. Based on whether the pre-determined condition is met, a clock input mode is selected that indicates whether the clock input terminals provide a differential clock input or a single-ended digital clock input.