Patent attributes
A class-AB driver design with improved frequency response is disclosed. In one embodiment, the class-AB driver includes a push-pull output stage, a trans-linear loop, an input stage, a current biasing and enabling circuit. Further, the trans-linear loop is coupled to a signal input terminal ABIN via node A, and the push-pull output stage is coupled to the trans-linear loop via node B and node C. Further, the trans-linear loop includes a speed balancing resistor RB in a faster signal traveling path (i.e., ABIN to ABOUT via node A and B) to match up the speed with a slower signal traveling path (i.e., ABIN to ABOUT via node A and C). In another embodiment, the MOS transistors are also used instead of the speed balancing resistor RB to balance the signal traveling time of the two signal traveling paths.
