US Patent 7669095 Methods and apparatus for error injection

In a first aspect, a first method of injecting one or more errors in data flowing into or out of a chip is provided. The first method includes the steps of (1) generating an error injection pattern indicating one or more bits of data on which a pseudo-random error is to be inserted; and (2) generating an error injection trigger indicating when the pseudo-random error is to be inserted. Numerous other aspects are provided.