Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Wang-Chin Chen0
Chun-Sung Su0
Date of Patent
March 9, 2010
0Patent Application Number
121950460
Date Filed
August 20, 2008
0Patent Primary Examiner
Patent abstract
For on-chip testing an on-chip power switch coupled to a core logic and to a decoupling capacitance, after the power switch enters a test mode, the decoupling capacitance is pre-charged or discharged; the power switch is turned ON or OFF according to test patterns; and a voltage level at the decoupling capacitance is analyzed or a leakage current flowing the power switch is measured. So that, whether the power switch is passed or failed is identified.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.