Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Akihiko Ohwada0
Date of Patent
March 9, 2010
Patent Application Number
11976516
Date Filed
October 25, 2007
Patent Citations Received
Patent Primary Examiner
Patent abstract
The load/sense control of the setting value that corresponds to the processor core for CMP, etc. processors that have multi-cores realize, for such processors with multi-core structures, the shortening of system boot time during multi-core operation, flexible debugging methods, and improvement of yield with the aid of partial core quality product chips at time of semiconductor production, by equipping a core selection flag register that maintains the status of each core, and controlling the output to the core block from the processor common block through that core selection flag register status.
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