Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Naoki Nakamura0
Date of Patent
March 16, 2010
0Patent Application Number
118965200
Date Filed
September 4, 2007
0Patent Primary Examiner
Patent abstract
A signal line, a power supply pattern and a ground layer are formed within a board. An outer via and an inner via are formed within the board. The outer via is connected to the signal line. The inner via is connected to the ground layer. The outer via serves as a signal line. The inner via serves as a ground. The signal line within a printed wiring board is connected to the outer via without interruption by a ground. The signal lines can spread within the printed wiring board in a complicated pattern as compared with a conventional pattern. Moreover, the impedance matching can reliably be established.
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