US Patent 7680116 Optimized buffer loading for packet header processing

A processing engine for processing header data includes a level 2 (L2) header generation unit and a level 3 (L3) header generation unit. The L2 and L3 header generation units are implemented in parallel with one another. The L2 generation unit writes L2 header information to a first buffer and the L3 generation unit writes L3 header information to a second buffer. When the L2 and L3 header generation units finish processing a data unit, the data unit may be unloaded from the first and second buffer while a new data unit is simultaneously loaded to the header processing engine.