Patent attributes
A data access method for serial bus is provided. During a write/read cycle, the write/read cycle is divided into a plurality of transmitting intervals and a plurality of suspending intervals. In each of the transmitting intervals, a clock signal is transmitted on a clock pin and a data signal is transmitted on a data pin. In each of the suspending intervals, the clock signal stop being transmitted on the clock pin. In other words, the present invention uses an interrupted clock signal, such that an embedded controller can directly write a received data in a flash memory or directly output the data read from the flash memory, so as to avoid using a plurality of registers. Therefore, the present invention can decrease the cost of the embedded controller and reduce the area of the integrated circuit.
