US Patent 7694031 Memory controller including a dual-mode memory interconnect

A memory controller including a dual-mode memory interconnect includes an input/output (I/O) circuit including a plurality of input buffers and a plurality of output drivers. The I/O circuit may be configured to operate in one of a first mode and a second mode dependent upon a state of a mode selection signal. During operation in the first mode, the I/O circuit may be configured to provide a parallel interconnect for connection to one or more memory modules. During operation in the second mode, the I/O circuit may be configured to provide a respective serial interconnect for connection to each of one or more buffer units, each configured to buffer memory data that is being read from or written to the one or more memory modules.