US Patent 7702840 Interface device lane configuration
Patent 7702840 was granted and assigned to Xilinx on April, 2010 by the United States Patent and Trademark Office.
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Lane configuration of an interface device of an integrated circuit is described. A core is used to tile a portion of an integrated circuit with a first version of the core and a second version of the core. The core is an application specific circuit version of an interface device. The first version and the second version in combination have a sharable interface. Each of the first version and the second version has N lanes. The first version is a primary version and the second version is a secondary version responsive to a shared interface mode. The N lanes of the second version are combined with the N lanes of the first version via the sharable interface for providing 2-by-N lanes of input/output to the first version.
US Patent 07702840 Interface device lane configuration US Patent 7702840 Interface device lane configuration
US Patent 07702840 Interface device lane configuration
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