A power semiconductor component (2) has a chip stack, which contains a first chip (10), a second chip (6) and a third chip (8), where at least the second chip (6) and the third chip (8) are the same height. The power semiconductor component (2) also has a package in which the first chip (10), the second chip (6) and the third chip (8) are placed. The second chip (6) and the third chip (8) are mounted side by side on a lead (4), and the first chip (10) rests both on the second chip (6) and on the third chip (8).