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US Patent 7705476 Integrated circuit package

Patent 7705476 was granted and assigned to National Semiconductor on April, 2010 by the United States Patent and Trademark Office.

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Patent attributes

Current Assignee

National Semiconductor

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Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

Patent Inventor Names

Jaime A. Bayan0

Anindya Poddar0

Date of Patent

April 27, 2010

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Patent Application Number

119360170

Date Filed

November 6, 2007

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Patent Citations Received

US Patent 12087677 Molded packaging for wide band gap semiconductor devices

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US Patent 11694947 Multi-pitch leads

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US Patent 11757290 Half-bridge circuit using flip-chip GaN power devices

US Patent 11770010 Half-bridge circuit using separately packaged GaN power devices

US Patent 11862996 Pulsed level shift and inverter circuits for GaN devices

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US Patent 11888332 Half-bridge circuit using monolithic flip-chip GaN power devices

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Patent Primary Examiner

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Patent abstract

Integrated circuit (IC) packages are described. Each IC package includes a die having an exposed metallic layer deposited on its back surface. Solder joints are arranged to physically and electrically connect I/O pads on the active surface of the die with associated leads. A molding material encapsulates portions of the die, leadframe and solder joint connections while leaving the metallic layer exposed and uncovered by molding material.

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