US Patent 7705850 Computer system having increased PCIe bandwidth

In a computer system employing PCI Express (PCIe) links, the PCIe bandwidth is increased by configuring an endpoint device with at least two PCIe interfaces, and coupling the first of these interfaces with a PCIe interface of a system controller and the second of these PCIe interfaces with an expansion PCIe interface of an I/O controller. Therefore, the endpoint device's performance becomes more efficient. For example, if the endpoint device is a graphics processing unit, then the endpoint device can execute more frames per second. When a read request is split up and issued as multiple read requests over the at least two PCIe interfaces, the multiple read completion packets that are received in response thereto are ordered in accordance with the timing of the multiple read requests.