Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Yoichiro Kawamura0
Katsuhiko Tanno0
Naoaki Fujii0
Shigeki Sawa0
Hironori Tanaka0
Date of Patent
May 11, 2010
0Patent Application Number
114765570
Date Filed
June 29, 2006
0Patent Primary Examiner
Patent abstract
A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. The ratio (H/D) of a height H of the solder bumps from solder resist layer surface to an opening diameter of the openings are made to be about 0.55 to about 1.0 with the pitch of the openings provided in the solder resist layer of about 200 μm or less.
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