Patent attributes
A non-volatile one time programmable memory cell couples in series a two terminal fuse and a three terminal antifuse. The non-volatile one time programmable memory cell includes a memory cell write enable node and a memory cell output node. The non-volatile one time programmable memory cell includes fuse having a first node and a second node, and an antifuse having a trigger node, a first node, and a second node. The trigger node is coupled to the memory cell write enable node. The first node of the antifuse and the second node of the fuse are coupled to the memory cell output node. First and second voltages appearing at the memory cell output node are indicative of first and second binary states of the memory cell. A plurality of such memory cells can be included in a non-volatile programmable memory array. A non-volatile programmable memory cell capable of re-programming is also included.
