Patent 7724592 was granted and assigned to Micron Technology on May, 2010 by the United States Patent and Trademark Office.
Memory devices having a normal mode of operation and a test mode of operation are useful in quality programs. The test mode of operation includes a data comparison test mode. The data comparison test mode systematically searches for addresses of defective columns by comparing a sensed data value to an expected data value at various levels of decoding. Upon detection of a defective column, the address value for each level of decoding is stored and can be used in redundancy selection to replace the defective columns with redundant columns. The comparison is internal to the memory device such that the test mode is independent of external testers and can be run after fabrication, even by an end user, thus allowing repair after fabrication and installation. The comparisons are facilitated by compare logic inserted into the data path.