Patent attributes
A semiconductor integrated circuit provided with an (m×n)-bit output mode and an n-bit output mode and including a set of (m×n) I/O portions 103 for outputting signals to the outside, wherein data with a bus width of (m×n) bits are selected by a set of selectors 101 in the (m×n)-bit output mode so that the data with the bus width of (m×n) bits are outputted from the set of (m×n) I/O portions 103 whereas data with a bus width of n bits are multiply selected by the set of selectors 101 in the n-bit output mode so that the data with the bus width of n bits are outputted from the set of (m×n) I/O portions 103 while multiplexed in at least two I/O portions per bit. Every I/O portions which output one and the same bit are short-circuited externally to improve current drive capacity.
